International Workshop on Secure RISC-V (SECRISC-V) Architecture Design Exploration
seeks original research papers on the design, implementation, verification, and evaluation of micro-architecture security features, hardware-assisted security techniques, and secure executions around the RISC-V instruction set architecture (ISA).

The organizing committee would like to thank all the speakers and attendees. Their presence helped to make this event a great success and their engagement helped make our time together both productive and fun.

We wish you all the best and hope that you continue to be engaged with the conference and associated events.

Sincerely,
SECRISCV Organizers